Structured ASIC-A New Breed Design Solution for the Future

Structured application specific integrated circuit (ASIC) vendors face their most critical challenge in choosing the right IPs and structures to include in their master slice. This is particularly crucial given that unnecessary IPs would necessitate extra die size as well as increase overall costs. Since customers are highly unlikely to pay for structures that are unrelated to their needs, vendors are currently working on determining the exact components of the master slice based on past experience of customer requirements. In some cases, they are even attempting to customize the master slice for certain key clients. The ability of vendors to adapt to the specific needs of customers is likely to decide the future of this market.

This research provides detailed market revenues and forecasts for the structured ASIC market by end application and geographical consumption. The scope of the study includes end applications such as communications, electronic data processing (EDP), industrial, consumer electronics, and "others" - which includes defense, aerospace, automotive, and medical electronics. This research also covers the forecast for the ASIC and field programmable gate arrays (FPGA) markets, various trends witnessed in these markets, and makes a case for why structured ASIC is here to stay.

Structured ASIC - A Natural Evolution

"At the time when economics threatens to inhibit technological evolution, the emergence of structured ASIC promises to provide hardware differentiation, excellent performance, and other essential attributes at affordable costs," says the analyst of this research service. Structured ASIC has evolved out of the spiralling costs associated with cell-based ASIC and the inability of FPGA to offer the performance, density, and power dissipation characteristics required by numerous applications.

Since only a part of the design is customized in a structured ASIC, this new approach offers other important benefits such as considerable simplification in the design chain, significantly lower non-recurring engineering (NRE) charges, and speedy turn around time.

Structured ASIC to Address the Market Window Between ASIC and FPGA

Structured ASIC is poised to tackle the growing need for an alternative to ASIC and FPGA as well as for faster time-to-market. "Structured ASIC combines some of the best features of both FPGA and ASIC, making it an automatic choice for a lot of designs done these days," says the analyst. "It addresses the market window between cell-based ASIC and FPGA effectively, providing excellent performance close to that of ASIC and flexibility and time-to-market close to that of FPGA," he adds.