Communications Processors: Weighing Architecture Alternatives

Communications processors are becoming an increasingly attractive alternative to conventional DSPs for applications such as cellphone base stations. Some of these new chips are as easy to program as a PC processor, yet much faster; others trade programming convenience for even higher performance. This report compares the most interesting new chips in this market, their architectures, and their implications for system designers.

Introduction

Architectural Alternatives

Microarchitecture

Integration

Extensions

New Architectures

Multiprocessing

Configurable Processors

Reconfigurable Processors

Combined Architectures

Commercial Implementation

BOPS’ ManArray

Chameleon’s Reconfigurable Communications Processor

Programmability Limited But Adequate

CPU Peripherals Round Out Chip Design

Silicon Available

Improv’s Jazz Programmable Speed Architecture

The nBand nFlex

Tensilica’s Xtensa

Conclusion

List of Figures

Figure 1. ManArray processing elements

Figure 2. The CS2112

Figure 3. Diagram of RCP tiles

Figure 4. Jazz PSA diagram

Figure 5. Jazz PSA task engine

Figure 6. Major subsystems present in an nFlex processor

Figure 7. Additions to Tensilica’s Xtensa processor core